drm/amd/pm: Disable MMIO access during SMU Mode 1 reset
- Published
- Last modified
- Where the record stands: published, rejected by its publisher, or superseded by another id.What do these mean? →
- published
- Whether CISA lists it in its Known Exploited Vulnerabilities catalog: proof that attackers are using it.What do these mean? →
- Not listed in CISA KEV
- Fix
- Fixed in 6.6.160, 6.12.70, 6.18.10
- Whether working attack code is public (Exploit-DB, Metasploit, Nuclei or GitHub). Public code makes attacks easier.What do these mean? →
- None on Exploit-DB, Metasploit or GitHub
Summary
In the Linux kernel, the following vulnerability has been resolved: drm/amd/pm: Disable MMIO access during SMU Mode 1 reset During Mode 1 reset, the ASIC undergoes a reset cycle and becomes temporarily inaccessible via PCIe. Any attempt to access MMIO registers during this window (e.g., from interrupt handlers or other driver threads) can result in uncompleted PCIe transactions, leading to NMI panics or system hangs. To prevent this, set the `no_hw_access` flag to true immediately after triggering the reset. This signals other driver components to skip register accesses while the device is offline. A memory barrier `smp_mb()` is added to ensure the flag update is globally visible to all cores before the driver enters the sleep/wait state. (cherry picked from commit 7edb503fe4b6d67f47d8bb0dfafb8e699bb0f8a4)
Timeline
- CVE published
- Record last updated
Affected versions
- Linux Linux
From ea8139d8d59bd6f014b317e7423345169a56fe49 · fixed in b2b9ac2bb2c5b5b0a39f7f422bbe12d3ea4ccf34; From ea8139d8d59bd6f014b317e7423345169a56fe49 · fixed in c1853ebbec980d5c05d431bfd6ded73b1363fd00; From ea8139d8d59bd6f014b317e7423345169a56fe49 · fixed in cd7ff7fd3e4b77f0b5a292e0926532eaa07c5162; From ea8139d8d59bd6f014b317e7423345169a56fe49 · fixed in 0de604d0357d0d22cbf03af1077d174b641707b6
- Linux Linux
5.9
- KernelLinux
From 5.9.0 · fixed in 6.6.160; From 6.7.0 · fixed in 6.12.70; From 6.13.0 · fixed in 6.18.10