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CVE-2025-52484GHSA-G3QG-6746-3MG9

RISC Zero zkVM Underconstrained Vulnerability

Published
Last modified
published
Not listed in CISA KEV
Fix
Fixed in 2.1.0, 2.0.4
None on Exploit-DB, Metasploit or GitHub
  • Exploitation: none
  • Automatable: yes
  • Technical impact: partial

Summary

RISC Zero is a general computing platform based on zk-STARKs and the RISC-V microarchitecture. Due to a missing constraint in the rv32im circuit, any 3-register RISC-V instruction (including remu and divu) in risc0-zkvm 2.0.0, 2.0.1, and 2.0.2 are vulnerable to an attack by a malicious prover. The main idea for the attack is to confuse the RISC-V virtual machine into treating the value of the rs1 register as the same as the rs2 register due to a lack of constraints in the rv32im circuit. Rust applications using the risc0-zkvm crate at versions 2.0.0, 2.0.1, and 2.0.2 should upgrade to version 2.1.0. Smart contract applications using the official RISC Zero Verifier Router do not need to take any action: zkVM version 2.1 is active on all official routers, and version 2.0 has been disabled. Smart contract applications not using the verifier router should update their contracts to send verification calls to the 2.1 version of the verifier.

Timeline

  1. CVE published
  2. CISA SSVC assessment

    Exploitation: none · Automatable: yes · Technical impact: partial

  3. Record last updated

Affected versions

  • risc0 risc0

    From 2.0.0 · fixed in 2.1.0

  • risc0-zkvmcrates.io

    From 2.0.0 · fixed in 2.1.0

  • risc0-circuit-rv32imcrates.io

    From 2.0.0 · fixed in 2.0.4

References 7

GitHub · risc0/risc0

GitHub · risc0/zirgen