pinctrl: qcom: msm: mark certain pins as invalid for interrupts
- Published
- Last modified
- Where the record stands: published, rejected by its publisher, or superseded by another id.What do these mean? →
- published
- Whether CISA lists it in its Known Exploited Vulnerabilities catalog: proof that attackers are using it.What do these mean? →
- Not listed in CISA KEV
- Whether working attack code is public (Exploit-DB, Metasploit, Nuclei or GitHub). Public code makes attacks easier.What do these mean? →
- None on Exploit-DB, Metasploit or GitHub
Summary
In the Linux kernel, the following vulnerability has been resolved: pinctrl: qcom: msm: mark certain pins as invalid for interrupts On some platforms, the UFS-reset pin has no interrupt logic in TLMM but is nevertheless registered as a GPIO in the kernel. This enables the user-space to trigger a BUG() in the pinctrl-msm driver by running, for example: `gpiomon -c 0 113` on RB2. The exact culprit is requesting pins whose intr_detection_width setting is not 1 or 2 for interrupts. This hits a BUG() in msm_gpio_irq_set_type(). Potentially crashing the kernel due to an invalid request from user-space is not optimal, so let's go through the pins and mark those that would fail the check as invalid for the irq chip as we should not even register them as available irqs. This function can be extended if we determine that there are more corner-cases like this.
Timeline
- CVE published
- Record last updated
Affected versions
- Linux Linux
Version range not reported
- Linux Linux
3.14
References 8
git.kernel.org
- stable/c/6a89563ccf9cd0d745e2291302878a061508573f
- stable/c/3f8fc02c2582c1dfad1785e9c7bc8b4e1521af0a
- stable/c/cb4b08a095b1fa4b3fca782757517e4e9a917d8e
- stable/c/cc145e02d6b8494c48f91958d52fa76b7e577f7b
- stable/c/1d57f7132662e96aace3b8a000616efde289aae1
- stable/c/275605a8b48002fe98675a5c06f3e39c09067ff2
- stable/c/97c9c7daeeb00c6e1d5e84084041f79c2d2dce22
- stable/c/93712205ce2f1fb047739494c0399a26ea4f0890