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CVE-2024-30212

Microchip Harmony 3 Core library allows read and write access to RAM via a SCSI READ or WRITE command

Published
Last modified
published
Not listed in CISA KEV
Fix
Fixed in 3.13.4
1 proof of concept on GitHub
  • Exploitation: poc
  • Automatable: no
  • Technical impact: partial

Summary

If a SCSI READ(10) command is initiated via USB using the largest LBA (0xFFFFFFFF) with it's default block size of 512 and a count of 1, the first 512 byte of the 0x80000000 memory area is returned to the user. If the block count is increased, the full RAM can be exposed. The same method works to write to this memory area. If RAM contains pointers, those can be - depending on the application - overwritten to return data from any other offset including Progam and Boot Flash.

Timeline

  1. CVE published
  2. CISA SSVC assessment

    Exploitation: poc · Automatable: no · Technical impact: partial

  3. Record last updated

Affected versions

  • core

    From 3.0.0 · fixed in 3.13.4

References 3

GitHub · Microchip-MPLAB-Harmony/core

GitHub · Fehr-GmbH/blackleak