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CVE-2021-26364

Insufficient bounds checking in an SMU mailbox register could allow an attacker to potentially read outside of the SRAM address range which

Published
Last modified
published
Not listed in CISA KEV
None on Exploit-DB, Metasploit or GitHub

Summary

Insufficient bounds checking in an SMU mailbox register could allow an attacker to potentially read outside of the SRAM address range which could result in an exception handling leading to a potential denial of service.

Timeline

  1. CVE published
  2. Record last updated

Affected versions

  • AMD EPYC™ Processors

    various

References 1

amd.com