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CVE-2020-12954

A side effect of an integrated chipset option may be able to be used by an attacker to bypass SPI ROM protections, allowing unauthorized SPI

Published
Last modified
published
Not listed in CISA KEV
Fix
Fixed in NaplesPI-SP3_1.0.0.G, RomePI-SP3_1.0.0.C, MilanPI-SP3_1.0.0.4
None on Exploit-DB, Metasploit or GitHub

Summary

A side effect of an integrated chipset option may be able to be used by an attacker to bypass SPI ROM protections, allowing unauthorized SPI ROM modification.

Timeline

  1. CVE published
  2. Record last updated

Affected versions

  • AMD 1st Gen AMD EPYC™

    fixed in NaplesPI-SP3_1.0.0.G

  • AMD 2nd Gen AMD EPYC™

    fixed in RomePI-SP3_1.0.0.C

  • AMD 3rd Gen AMD EPYC™

    fixed in MilanPI-SP3_1.0.0.4

References 1

amd.com